🚨 The Alarm That Remembers

What you're building

Every alarm you've built so far forgets. The Trip Wire wails while the wire is cut and goes quiet the instant it's reconnected. A burglar who opens a door and closes it again leaves no trace.

This one remembers. The green LED means all clear. Tap SET, the button standing in for a door switch, and the red LED comes on and stays on after you let go. It stays on until someone presses RESET. No microcontroller, no code: just two NAND gates from a CD4011, wired so each one's output feeds the other's input. That loop is called a set-reset latch, and it's how a circuit stores one bit of memory.

Quick NAND refresher

From The Two-Key Lock: a NAND gate's output is low (0) only when both inputs are high (1). In every other case it's high. Put the other way round: if either input is low, the output is high. That second version is the one you need here.

The loop

Call gate 1's output Q and gate 2's output Q̄ ("Q-bar", meaning "not Q"). Wire them like this:

• Gate 1's inputs: the SET line and Q̄.
• Gate 2's inputs: Q and the RESET line.

Each output feeds the other gate. Now suppose both SET and RESET sit high, doing nothing, and Q happens to be low. Gate 2 sees a low input (Q), so Q̄ is high. Gate 1 sees SET high and Q̄ high, both high, so Q is low. That's what we assumed, so the loop holds itself there: stable.

Now suppose Q is high instead. Gate 2 sees Q high and RESET high, so Q̄ is low. Gate 1 sees Q̄ low, so Q is high. Also stable.

Same inputs, two possible states, and the circuit stays in whichever one it's in. That's memory. It needs no moving parts, only the two gates holding each other up.

Changing its mind

The buttons pull a line low when pressed. Each line idles high through a 100 kΩ pull-up to +.

• Press SET. Gate 1 sees a low input, so Q goes high whatever Q̄ was. Gate 2 now sees Q high and RESET high, so Q̄ goes low. Let go of SET: gate 1 still sees Q̄ low, so Q stays high. Tripped, and it stays tripped.
• Press RESET. Gate 2 sees a low input, so Q̄ goes high. Gate 1 now sees both inputs high, so Q goes low. Let go: Q̄ stays high. All clear.

Because the inputs act when they're pulled low, engineers call this an active-low S̄R̄ latch. The bar over each letter means "low does it".

Both buttons at once

Hold SET and RESET together. Both gates see a low input, so both outputs go high: red and green lit together. Q and "not Q" are both 1, which is a contradiction, and it's why this input is called the forbidden state. Let go of both at exactly the same instant and the latch could land either way. On a real breadboard you'll never release them at exactly the same moment, so whichever button you let go of last wins.

Waking up: the 100 nF

When you first connect the battery, which state does the latch start in? Neither gate has a reason to prefer one, so it could be either. An alarm that sometimes powers up already tripped is no good.

The fix is a 100 nF capacitor from the RESET line to −. At power-up the capacitor is empty, so it holds RESET at 0 V, and the latch resets. Then it charges through the 100 kΩ pull-up. The time constant, the time to cover about 63% of the way, is

τ = R × C = 100 000 Ω × 0.000 000 1 F = 0.01 s (10 ms)

The CD4011 reads an input as high above half the supply. A charging capacitor reaches half-way after τ × ln 2:

t = 0.01 × 0.693 ≈ 6.9 ms

So for its first 7 ms of life the alarm is held in reset. After that, RESET is high and the latch keeps the state it was forced into: all clear. You'll never see the 7 ms. You'll just find the green LED on every time you power up. This trick is called a power-on reset, and almost every digital device has one.

The LEDs

Each output drives its LED through a 220 Ω. The simulator models a CD4011 output as about 200 Ω to the rail it's driving, as in The Two-Key Lock:

red: (4.5 − 2.0) ÷ (200 + 220) ≈ 6.0 mA

green: (4.5 − 2.1) ÷ (200 + 220) ≈ 5.7 mA

The green LED has a slightly higher forward voltage, so slightly less current. The output pin sags to about 3.3 V under that load, still well above the 2.25 V half-way line, so the gate reading it still sees a firm 1 and the loop holds. On a real CD4011B expect dimmer LEDs: its outputs are rated nearer 1 mA at 5 V and sag more.

Reading the pins

Notch at the top left; pins 1 to 7 down the left, 8 to 14 up the right.

• Gate 1: pin 1 (A1) = SET line, pin 2 (B1) = Q̄, pin 3 (Y1) = Q.
• Gate 2: pin 5 (A2) = Q, pin 6 (B2) = RESET line, pin 4 (Y2) = Q̄.
• Power: pin 14 to +, pin 7 to −.
• Spare gates 3 and 4: every input tied to a rail. Pins 8 and 9 to −, pins 12 and 13 to +.

The two cross-couple wires are pin 4 → pin 2 and pin 3 → pin 5.

Build it

1. Rails: + along the top, − along the bottom, battery between them.
2. The chip: across the centre gap, notch at the top. Pin 14 to +, pin 7 to −. Then tie off pins 8, 9 (to −) and 12, 13 (to +).
3. The loop: jumper pin 4 to pin 2, and pin 3 to pin 5.
4. SET: 100 kΩ from + to pin 1; button from pin 1 to −.
5. RESET: 100 kΩ from + to pin 6; button from pin 6 to −; 100 nF from pin 6 to −.
6. LEDs: pin 3 → 220 Ω → red LED long leg, short leg to −. Pin 4 → 220 Ω → green LED long leg, short leg to −.
7. Power up: green. Tap SET: red, and it stays red. Tap RESET: green again.

On the Workbench the board runs in time. Watch the chip's output pads: the lit one is the gate whose output is high.

Debug like an engineer

Measure pin 3 and pin 4. One should be near 4.5 V and the other near 0 V, never both the same unless you're holding both buttons. If the state doesn't hold after you let go, or the LEDs behave at random, a gate has a floating input: check the two cross-couple wires first, then that both pull-ups reach + and the spare gates are tied off. If it powers up red, the 100 nF isn't on pin 6.